Datos sobre el nuevo chip de nVidia, NV35
Ha aparecido en nvnews un mensaje en sus foros en el que un usuario "bien informado" detalla las novedades que aportará el nuevo chip gráfico de nVidia, el NV35, que será presentado en el show E3 entre el 14 y el 16 de mayo.
Pulsa sobre "Leer mas" si entiendes inglés y estás interesado en estas novedades.
- CineFX Shading Architecture;
- Support for the Microsoft DirectX 9.0 Pixel Shader 2.0 (and where are the plusses?);
- Support for the DirectX 9.0 Vertex Shader 2.0;
- Long pixel programs up to 1024 instructions;
- Long vertex programs up to 256 static instructions with up to 65 536 instructions executed;
- Dynamic, conditional execution and flow control;
- 256-bit advanced memory interface combines a wider memory data path with next generation controller technology for superior performance and throughput;
- Full 128-bit, studio-quality floating point precision through the entire rendering pipeline with native hardware support for 32bpp, 64bpp and 128bpp rendering modes;
- Accelerated pixel shaders allow for up to 12 pixel shader operations/clock;
- Up to 16 textures per rendering pass;
- Support for sRGB texture format for gamma textures;
- Intellisample performance technology, a Hi-Res compression technology (HCT), increases performance at higher resolutions through advances in compression and anti-aliasing technology’
- Shadow Volume Accelerator – accelerates shadow volumes by maintaining them more accurately and discarding useless information;
- Full nView multi-display technology capability;
- Integrated NTSC/PAL TV encoder supporting resolutions up to 1024x768 without the need for panning with built-in Macrovision copy protection;
- Microsoft Video Mixing Renderer (VMR) creates support for multiple video windows with full video quality and features in each window;
- DVD and HDTV-ready MPEG-2 decoding up to 1920x1080i resolutions;
- Dual, integrated 400MHz RAMDACs for display resolutions up to and including 2048x1536 @ 85 Hz;
- Dual DVO ports for interfacing to external TMDS transmitters and external TV encoders;
- Dual internal TMDS encoders (one single and one Dual link) able to drive next-generation flat panel displays with resolutions greater than 1600x1200;
- Digital Vibrance Control 3.0;
- 0.13 micron process technology for higher levels of integration and higher operating clock speeds;
- 40 mm x 40 mm, BGA 1309 flip-chip package;
- Comprehensive Microsoft DirectX 9.0 (and lower) and OpenGL 1.4 (and earlier) support;
- DirectX and S3TC texture compressions.
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